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作为现代电子计算机和电子交换机等信息处理装置的主存贮器和缓冲存贮器,半导体集成电路存贮器正受到注视。本文描述关于采用廉价的MOS集成电路作存贮单元而用双极集成电路作外围电路所构成的超高速缓冲存贮器的可能性的探讨、各个电路的设计、大规模集成(LSI)电路的构成和使用这样LSI电路存贮装置的试制研究结果。LSI是在同一陶瓷基片上把读出线和位线分离的MOS存贮单元和双极外围电路(矩阵、读出放大器)用梁式引线连接起来的多片形式。得到的高性能水平是单个512位LSI的取数时间为6毫微秒,1K字节存贮装置的取数时间为30毫微秒、周期时间为35毫微秒。从存贮装置的特性研究中判明了这次采用的电路形式和LSI的构成方法,对于高速化、高密度化是非常有效的。
As the main memory and buffer memory of information processing devices such as modern electronic computers and electronic switches, semiconductor integrated circuit memories are being watched. Described herein is a discussion of the possibility of using a cheap MOS integrated circuit as a memory cell and a bipolar integrated circuit as a cache of peripheral circuits. The design of each circuit, the LSI circuit The result of a trial production of such an LSI circuit memory device is constructed and used. LSI is a multi-chip form in which MOS memory cells that separate sense and bit lines and bipolar peripheral circuits (matrix, sense amplifiers) are connected by a beam lead on the same ceramic substrate. The resulting high performance levels are 6 nanoseconds for a single 512-bit LSI, 30 nanoseconds for a 1Kbyte device, and 35 nanoseconds for the cycle time. From the study of the characteristics of the memory device, it has been found that the circuit type and the method for forming the LSI adopted this time are very effective for high-speed and high-density.