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设计了与TI公司的TMS32 0C6 2 0 1评估板接口的实时图像显示电路 ,介绍了C6 0 0 0系列DSPs的EMIF异步接口的控制要求及与VRAM接口的方法 ;采用单片EPLD实现了显示电路的全部控制功能 ,其中包括VRAM读写和刷新控制及显示同步控制 ;DSP与显示帧存间的数据传输采用了DMA方式 ,充分利用了TMS32 0C6 2 0 1的定时器、中断和DMA等硬件资源 ,节省了CPU的时间开支。可在 10 2 4× 6 0 0分辨率、6 0Hz帧频下实时显示DSP处理后的图像
The real-time image display circuit interfaced with TI’s TMS32 0C6201 evaluation board was designed. The control requirements of the EMIF asynchronous interface and the interface with the VRAM of the C600 series DSPs were introduced. The single chip EPLD was used to realize the display circuit Including all the control of VRAM read and write and refresh control and display synchronization; data transfer between DSP and display frame using DMA mode, take full advantage of TMS32 0C6 2 0 1 timer, interrupt and DMA hardware resources , Saving CPU time expenditure. DSP-processed images can be displayed in real time at 10 2 4 × 6 0 0 resolution with 60Hz frame rates