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本文对CCD驱动时钟串扰进行了详细分析,首次提出了一种改进的驱动时钟波形。与现在推荐使用的驱动时钟相比,该时钟不仅能够保证CCD有高的转移效率和高的信号处理能力,而且它在CCD各部分的干扰也相应减少了六倍左右。经过对CCD电荷转移过程的分析,提出了设计最佳驱动波形的准则以及计算机模拟方法和结果,并用实验验证了理论分析的正确性。文中还对注入过程进行了分析,指出了受时钟干扰影响较小的注入方法。同时还推导出了在输入端受输入电路限制的CCD最高时钟频率的表达式。
In this paper, CCD driving clock crosstalk was analyzed in detail, and for the first time an improved driving clock waveform was proposed. Compared with the currently recommended drive clock, the clock not only ensures high transfer efficiency and high signal processing capability of the CCD, but also reduces the interference in all parts of the CCD by about six times. After analyzing the charge transfer process of CCD, the guidelines for designing the optimal driving waveform and the computer simulation methods and results are presented. The correctness of the theoretical analysis is verified by experiments. In the paper, the injection process is also analyzed, and the injection method that is less affected by the clock disturbance is pointed out. Also deduced at the input by the input circuit limits the maximum CCD clock frequency expression.