1.引言在选择大容量高速存贮器的记忆元件、驱动钱路和读出线路的时候,需要在技术和经济两方面取得平衡。作者认为,简化读出线路会明显地影响这种平衡。本文将介绍关于这种线路速度、灵敏度、尺寸等的极限的研究工作情况。通常,读出线路包括一个放大器、一个门和一个触发器。如果在读出被选记忆单元的过程中要破坏所存信息,则在被选单元回到它的原始状态时,读出线路也必须起暂时记忆的作 1. INTRODUCTION In the selection of memory components for high-speed memory, driving the money path and reading the line requires a balance between technology and economy. The author believes that simplifying the readout line can significantly affect this balance. This article will introduce the research work on the limits of such line speed, sensitivity, size and so on. In general, the sense line includes an amplifier, a gate, and a flip-flop. If the stored information is to be destroyed during the reading of the selected memory cell, the read circuit must also be temporarily memorized when the selected cell returns to its original state