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在分析维特比译码器回溯算法的基础上,归纳出回溯算法的规律,提出了双读出回溯(DRTB)算法。计算表明,DRTB算法在不增加硬件开销的情况下,使回溯运算速度达到原来的4倍。本文还介绍了基于DRTB算法幸存路径存储器单元(SMU)的ASIC结构和物理设计。对半导体集成电路的测试表明,本文提出的DRTB算法及电路结构是成功的。
Based on the analysis of the Viterbi decoder backtracking algorithm, the law of the backtracking algorithm is summarized and the double readout backtracking (DRTB) algorithm is proposed. The calculation shows that the DRTB algorithm makes the backtracking speed up to 4 times without increasing the hardware overhead. This article also introduces the ASIC structure and physical design of the survivated path memory unit (SMU) based on the DRTB algorithm. The test of the semiconductor integrated circuit shows that the proposed DRTB algorithm and the circuit structure are successful.